(1) Field of the Invention
The present invention relates to semiconductor devices and methods for fabricating the same, and more particularly relates to semiconductor devices in which transistors of a salicide structure (hereinafter, referred to as “salicide transistors”) and transistors of a non-salicide structure (hereinafter, referred to as “non-salicide transistors”) are formed on the same substrate and methods for fabricating the same.
(2) Description of Related Art
In recent years, with increases in the degree of integration and operating speed of semiconductor integrated circuits, gate electrodes and interconnects of metal insulator semiconductor field effect transistors (MISFETs) are becoming finer.
Accordingly, there has been a demand for salicide transistors each having a low-resistance electrode. A salicide transistor is formed in the following manner: Refractory metal films are formed on source/drain diffusion regions formed in a silicon substrate and a gate electrode of polysilicon, and then the refractory metal films are subjected to heat treatment so that silicide layers of a refractory metal are formed on the respective top surfaces of the source/drain diffusion regions and gate electrode in a self-aligned manner.
However, a salicide transistor has a low resistance to application of a high voltage and a high current both caused by static electricity (surges) or the like from outside to the salicide transistor and is therefore likely to be broken. Hence, in general, in order to enhance the resistance to a high voltage and a high current both caused by surges or the like, non-salicide transistors are often used for input/output circuits of semiconductor devices.
Resistors having a desired resistance are demanded for analog circuits or other circuits. Therefore, instead of source/drain diffusion layers and a gate electrode of a salicide structure having a low resistance, source/drain diffusion layers and a gate electrode of a non-salicide structure having a fixed resistance may be required.
A semiconductor device in which salicide transistors and non-salicide transistors are both formed on the same substrate is formed in the following manner. First, a plurality of transistors are formed on a substrate, and then a protective film of silicon oxide or any other material is formed to cover the transistors. Next, parts of the protective film covering some of the transistors that will become salicide transistors are removed, and then the entire substrate area is salicided (see, for example, Japanese Unexamined Patent Publication No. 2001-144287).
For a known semiconductor device, for example, a thick silicon oxide film needs to be used as a protective film. The protective film must be formed after formation of source/drain diffusion layers. In view of the above, in order to maintain the diffusion profile of the source/drain diffusion layers, the protective film must be formed at a low temperature. Therefore, an oxide film deposited at a temperature of 750° C. or less by chemical vapor deposition (CVD) is used as the protective film.
An oxide film deposited by low-temperature CVD has a lower density than a thermal oxide film formed by high-temperature heat treatment and when etched using hydrofluoric acid and a mixed solution of ammonia and a hydrogen peroxide solution (ammonium hydroxide hydrogen peroxide mixture (APM)), has a very high etch rate. In view of the above, when the protective film is thin, it becomes lost in wet cleaning carried out in a semiconductor device fabrication process. As a result, non-salicide transistors cannot be protected. As seen from the above, the protective film needs to have a thickness of 30 nm or more.
An increase in the thickness of a protective film causes the following problems. FIG. 4 illustrates a cross section of a known salicide transistor. A protective film 118 is formed on the entire surface of a substrate 111, and then a portion 122 of the protective film 118 located on a region of the substrate 111 on which the salicide transistor is to be formed is removed by dry etching. However, since the protective film for a known semiconductor device is thick, the portion 122 of the protective film 118 is left at the foot of each of sidewalls 120 as illustrated in FIG. 4. When the entire substrate area is further etched to prevent the protective film from being partially left at the foot of each sidewall, the top surfaces of a source/drain 121 and gate electrode 114 are cut away by overetching, resulting in deteriorated transistor characteristics.
When the entire substrate area is salicided with the protective film partially left at the foot of each sidewall, this makes an area in which ones of silicide layers 123 located on the source and drain are formed smaller. Miniaturization of semiconductor devices allows the distance between adjacent ones of gate electrodes to be approximately 140 nm. This increases the influence of the unintentionally left part of the protective film having a thickness of several tens of nm, leading to the increased contact resistance of a contact plug connected to the silicide layer 123.